Icemax 2.0 addresses the following general categories of significant advances, all based on suggestions and requests of current Icemax users:

• Detailed analysis of multiport nets, particularly for multi-die system-in-package designs and internal ground/power nets
• Mesher and solver optimization to facilitate full package extraction of high pin-count packages, including multilayer flip chip designs
• Parametric solution capability to enable users to perform a frequency sweep and detailed design optimization

Some of the most extensive refinements have been made to the solver engine. “Using advanced memory management and parallel computing technologies, we are now able to solve more than 10-layer flip chip, 1200+ pin layouts a matter of hours. Other EDA tools just cannot deal with these high pin-count packages that are becoming the norm in the industry today”, says Dr. Rajesh Nair, Icemax product manager. “As the packaging industry moves aggressively toward adopting flip chip and system-in-package layouts, it is necessary that software tools are able to provide customers with solutions in a practical timeframe. Icemax 2.0 addresses this crucial bottleneck in the design flow.”

Icemax 2.0 also takes a significant step toward addressing the power delivery problem in a multi-layered package. Users can now generate detailed, multi-port SPICE models representing ground/power nets coupled with signal nets. These models can be subsequently used for simulating complex problems such as Simultaneous Switching Noise and Ground Bounce. Another unique feature in the new release involves the ability to set up multiple runs automatically within the same model context. Users can now easily perform “what-if” studies by varying parameters such as material properties, ground plane height and frequency among others.